1. Field of the Invention
This invention relates to a semiconductor integrated circuit device and a data programming method thereof.
2. Description of the Related Art
The memory capacity of a nonvolatile semiconductor memory device, particularly, a NAND-type flash memory has become markedly increased. With the increase in memory capacity, memory cells and transistors in a peripheral circuit of the memory are further miniaturized. One typical example of a NAND-type flash memory having large-scale memory capacity is disclosed in Jpn. Pat. Appln. KOKAI Publication No. 2000-91546 (corresponding to U.S. Pat. No. 6,353,242), for example.
However, even if the memory cells and transistors are miniaturized, it is difficult to reduce the size of a memory cell array since the memory capacity is large. That is, it is difficult to reduce the length of the bit lines. In practice, the length of the bit lines tends to become greater. In spite of the present condition, the arrangement pitch of bit lines becomes narrow with increasing miniaturization of the memory cells and transistors. For this reason, the bit line capacitance tends to rapidly increase because of the bit line structure.
If the bit line capacitance rapidly increases, much attention must be paid to an increase in the bit line precharge period during data programming.
If the present condition becomes even more severe, it may become a bottleneck in the performance, particularly, in the high-speed operation of semiconductor memories.